Q1:

The figure of merit of a logic family is given by.

Q2:

The logic function, F= ab+bc+ca is given by

1. The output of a 3-inputs EX-OR gate.

2. The output of a 3-input majority gate.

3. The sum output of a full adder.

4. The carry output of a full adder.

Which of these statements are correct?

Q3:

A binary full-subtractor

Q4:

A register contain a 2’S complement no 10100. Find the value of a register if it is divided by 2.

Q5:

The initial content of the 4-bit serial-in-parallel out, right shift, shift register as shown in figure are 0110. After 3 clock pulses the contents of the shift register will be

Q6:

To implements 3 I/P Ex-OR gate using 4x1 MUX the following arrangement has been done.

The input I₀,I₁,I₂ and I₃ in the same order that has to be applied are:

Q7:

To implements half substractor, minimum number of 2x1 multiplexers required are

Q8:

F(A,B,C) = ${\displaystyle \sum m(1,3,4,7)}$ This expression using 4:1 mux is realized by?

Q9:

A 3 to 8 decoder is shown below all the output lines of the chip will not be high. When

Q10:

In the following circuit, X is given by:

Q11:

The Boolean function F implemented in the figure using two input multiplexers is

Q12:

The output Y of a 2-bit comporator is logic 1 whenever the 2-bit input A is greater than the 2-bit input B. The number of combination for which the output is logic 1 is

Q13:

The minimum number of 2 to 1 multiplexers required to realize a 4 to 1 multiplexer is

Q14:

What is the number of select lines required in a single input n-output demultiplexer?

Q15:

The addition of two binary variables A and B results into a sum and a Carry output consider the following expressions for the sum and Carry outputs.

$\begin{array}{l}1.Sum=A.B+\overline{A}\overline{B}\\ 2.Sum=A.\overline{B}+\overline{A}B\\ 3.CARRY=A.B\\ 4.CARRY=A+B\end{array}$

Which of these expressions are correct?