Q1:

Which of the following equations satisfies the j K flip-flop truth table?

Q2:

A 4-bit modulo-16 ripple counter uses J K flip-flops. If the propagation delay of each F.F is 50ns, the maximum clock frequency that can be used is equal to.

Q3:

The circuit given below is a

Q4:

A 4-bit ripple counter and a 4-bit synchronous counter are made using flip-flops having a propagation delay of 10ns each. If the worst case delay in the ripple counter and the synchronous counter be R and S respectively then.

Q5:

The number of unused states in a 4-bit Johnson Counter is

Q6:

Which of the following measurements can be done using a counter?

1. Pulse duration

2. Interval between two pulses.

3. Amplitude of the pulse.

4. Rise time of pulse.

Select the correct answer from the codes given below.

Q7:

In a sequential circuit, the output at any instant of time depends.

Q8:

The character equation of the T flip-flop is given by.

Q9:

The highest speed counter is

Q10:

The outputs of the two flip-flops Q₁, Q₂ in the figure shown are initialized to 0, 0 the sequence generated at Q₁ upon application of clock signal is.

Q11:

The state Transistor diagram for the logic circuit shown is

Q12:

Consider the given circuit

In this circuit, the race around.

Q13:

A 3-variable truth table has a high output for the inputs: 010,011and110, the Boolean expression for sum of product (sop) can be written as.

Q14:

The given figure shows a NAND gate with input waveforms A and B

The correct output waveform x of the gate is

Q15:

The inverter 74 AL S01 has the following specification.

I_OH max=-0.4mA, I_OL max=8mA

I_IH max =20μA ,I_IL max=-0.1mA

The fan out based on the above will be

Q16:

An 8-bit D/A converter has full scale output voltage of 20V. The output voltage when the input is 11011011 is.

Q17:

The initial content of the 4-bit serial-in-parallel out, right shift, shift register as shown in figure are 0110. After 3 clock pulses the contents of the shift register will be

Q18:

The logic function implemented by the circuit below is (ground implies a logic ‘0’):

Q19:

Consider the following statements.

A half adder

1. Is a half – subtractor also

2. Has two outputs $C_h$= x.y and $S_h$= x$\oplus$y for two inputs x and y.

3. Has two outputs $C_h$= x+y and $S_h$= x$\oplus$y for two input x and y.

4. Is a combinational circuit.

Which of the statements given above is/are correct ?

Q20:

The Boolean expression for the shaded area in the Venn diagram is