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Made bySaurav Hathi

ECE - Mock Test - 10

Q1:

The total number of memory accesses involved (inclusive of the OP code fetch), when an 8085 processor executes the instruction OUT 80H is

Tags:
ARMIET_ECE_MCU
PlaceMe2_DC&MPMock2
NEAT_DC&MPMock2
Section:
Microprocessor
Options:
Q2:

A 4-bit ripple counter and a 4-bit synchronous counter are made using flip-flops having a propagation delay of 10ns each. If the worst case delay in the ripple counter and the synchronous counter be R and S respectively then.

Tags:
PlaceMe2_DC&MPMock2
NEAT_DC&MPMock2
Section:
Digital Circuits
Options:
Q3:

A 1ms pulse can be converted into a 10ms pulse by using which  one of the following?

Tags:
PlaceMe2_DC&MPMock2
NEAT_DC&MPMock2
Section:
Digital Circuits
Options:
Q4:

The number of unused states in a 4-bit Johnson Counter is

Tags:
PlaceMe2_DC&MPMock2
NEAT_DC&MPMock2
Section:
Digital Circuits
Options:
Q5:

The highest speed counter is

Tags:
Truechip_M1
PlaceMe2_DC&MPMock2
NEAT_DC&MPMock2
Section:
Digital Circuits
Options:
Q6:

Consider the following statements regarding registers and latches.

1.Registers are temporary storage devices, whereas latches are not 

2.A latch employs cross-coupled feedback connections.

3.A register stores a binary word, where as a latch does not.

The correct statement is/are.

Tags:
PlaceMe2_DC&MPMock2
NEAT_DC&MPMock2
Section:
Digital Circuits
Options:
Q7:

 A Ring oscillator consisting of 5 inverters is running at a frequency of 10 MHz. The propagation delay per gate is :

Tags:
PlaceMe2_DC&MPMock2
NEAT_DC&MPMock2
Section:
Digital Circuits
Options:
Q8:

A 5 bit module-32 ripple counter uses JK flip-flop if the propagation delay of each FF is 50ns, maximum clock frequency is (in mHz)

Tags:
PlaceMe2_DC&MPMock2
NEAT_DC&MPMock2
Section:
Digital Circuits
Options:
Q9:

Match List-I (circuit) List-II (application) and select the correct answer using the code given below.

                List-I

List-II

A. Ripple up counter

1. Division.

B. Synchronous down counter.

2. Multiplication

C. Shift left register

3. To create delay.

D. Shift right register.

4. Transient states

 

Tags:
PlaceMe2_DC&MPMock2
NEAT_DC&MPMock2
Section:
Digital Circuits
Options:
Q10:

The counter which requires maximum number of flip-flops for a given MOD number is

Tags:
PlaceMe2_DC&MPMock2
NEAT_DC&MPMock2
Section:
Digital Circuits
Options:
Q11:

A circuit consists of two synchronous clocked J-K flip-flop connected as follows: J0=K0=Q¯1,J1=Q0,K1=Q¯0,the circuit acts as a.

Tags:
PlaceMe2_DC&MPMock2
NEAT_DC&MPMock2
Section:
Digital Circuits
Options:
Q12:

The initial state of MOD-16 down counter is 0110. After 37 clock pulses, the state of the counter will be.

Tags:
PlaceMe2_DC&MPMock2
NEAT_DC&MPMock2
Section:
Digital Circuits
Options:
Q13:

If the memory chip size is 1024 × 4, the number of memory chips required to design 8 K memory is

Tags:
PlaceMe2_DC&MPMock2
NEAT_DC&MPMock2
Section:
Digital Circuits
Options:
Q14:

If (11X1Y)8 = (12C9)16 then the value of X and Y are:-

Tags:
Truechip_M1
PlaceMe2_DC&MPMock2
NEAT_DC&MPMock2
Section:
Digital Circuits
Options:
Q15:

In the circuit shown Q, has negligible collection–to-emitter saturation voltage and the diode drops negligible voltage across it, under forward bias negligible voltage across it. If Vcc is 5v, X and Y are digital signals with 0v as logic 0 and Vcc as logic 1. The Boolean expression for Z is

Tags:
PlaceMe2_DC&MPMock2
NEAT_DC&MPMock2
Section:
Digital Circuits
Options:
Q16:

When the Boolean function

F(x1,x2,x3)=∑(0,1,2,3)+∑d(4,5,6,7)

is minimized what does one get?

Tags:
E&I_KIIT_4Dec
Truechip_M1
PlaceMe2_DC&MPMock2
NEAT_DC&MPMock2
Section:
Digital Circuits
Options:
Q17:

The minimum number of comparators required to build an 8-bit flash ADc is.

Tags:
PlaceMe2_DC&MPMock2
NEAT_DC&MPMock2
Baseline3_2ndYear_EIE
Section:
Digital Circuits
Options:
Q18:

Assertion (A): the switching speed of ECL gate is very high.

Reason (R) : the devices in ECL gate operate in active region .

Tags:
PlaceMe2_DC&MPMock2
NEAT_DC&MPMock2
Section:
Digital Circuits
Options:
Q19:

Which of the following circuits come under the class of combinational logic circuits?

1. Full adder 2.Full subtractor 3.Half adder 4.JK flip-flop 5.Counter

Select the correct answer from the codes given below.

Tags:
PlaceMe2_DC&MPMock2
NEAT_DC&MPMock2
Section:
Digital Circuits
Options:
Q20:

Find ‘Y’ from the given MUX when

I0=πM(3)for  f(A,B)I1=πM(6,7)for  f(A,B,C)I2=A¯+B¯I3=πM (12,13,14,15)  for  f(A,B,C,D)

& selection lines S0,S1 can be the choice of user to use only binary singles.

Tags:
PlaceMe2_DC&MPMock2
NEAT_DC&MPMock2
Section:
Digital Circuits
Options: